Dr. Mark Huang
Unisteel, Singapore

Mark Huang holds the B.E. and M.E. in Polymer Physics from Hefei University of Technology, and the Ph.D. degree in Polymer Chemistry from The Institute of Chemistry, Chinese Academy of Science. He was a Postdoctoral Fellow at National University of Singapore from 1996 to 1998. He was a Material Engineer at Yizheng Chemical Fiber Company, Jiangsu, China from 1991 to 1993, a Senior Process Engineer at Hitachi Chemical Asia/Pacific, a Principal Engineer at Micron Semiconductor Asia from 2001 to 2008 and a Principle Member of Technical Staff at StatschipPAC and Institute of Microelectronics from 2009 to 2010. Dr. Huang joined Unisteel Technology Ltd (Singapore) as a Senior R & D Manager. He expertises in IC packaging materials (underfill, encapsulants, die-attach film/paste etc) and has been a key technical contributor to the R & D and implementation of advanced assembly technologies inclusive of Flip Chip in Package (FCIP), System in Packaging / Multi Chip Package (SiP/MCP), Wafer Level Chip Scale Package (WLCSP), Cu-Pillar Interconnection, Through Silicon Via (TSV), Untra-thin Wafer Processing and Cost-viable QFN Packages.  He has published over 50 technical papers and holds 25 U.S. patents and 1 Singapore patent. His research interests include 3D-IC integration and assembly as well as materials-oriented research and development.